11 - Wafer-thickness1

Thickness Measurement for Metrology Systems

ASTM F657:

The distance through a wafer between corresponding points on the front and back surface. Thickness is expressed in microns or mils (thousandths of an inch).

Total Thickness Variation (TTV)

ASTM F657:

The difference between the maximum and minimum values of thickness encountered during a scan pattern or series of point measurements. TTV is expressed in microns or mils (thousandths of an inch).

Why is wafer shape such as Thickness, TTV, BOW and Warp important?

The flatness of wafers used to manufacture integrated circuits is controlled to tight tolerances to help ensure that all of the wafer is sufficiently flat for lithographic processing. Optical lithography methods will continue to be used past the 100 nm technology generation for patterning of larger feature sizes. The variations in wafer flatness must be smaller than the depth of focus of optical lithography exposure tools over the illuminated region of the top surface of the wafer+films. To ensure the wafers remain in the depth of focus of the lithography process being used it is necessary to measure the Thickness, TTV, BOW and WARP of the wafers to ensure the wafer’s top physical surface is planar and within the specification of the lithography system being used otherwise there could be defective IC patterns which raise costs through scrap and wasted time.

Rather than discard out of spec wafers it is also possible to sort the wafers by ThicknessTTVBOW and WARP so that they may still be used with longer wavelength lithography systems or eventually reclaimed by being melted back down and turned into new ingots if they are too far out of spec.

Measuring the wafers thickness and TTV also allows for process control of the CMP (Chemical Mechanical Planarization or Polishing) /Lapping processes and allows these processes to be adjusted to meet customer needs.

Wafers for MEMS applications are commonly double-side polished. This can be done either by polishing first one side, then flipping the wafer over and polishing the second side, or polishing both sides simultaneously between two rotating polishing pads. The challenge is to retain the good wafer flatness achieved in previous process steps. This is where monitoring the wafer Thickness and TTV can become very important in controlling the polishing process.

Post processing of wafers with resists and films can cause BOW and WARP due to stress on the wafer caused by these post process films. MTI’s 300iSA can be used to check for BOW and WARP after these post processing film operations. Even though there is a film on the wafer the 300iSA can still make the measurement.

Lithography tools use vacuum chucks. It is assumed that the wafer is pulled down on the chuck so that the backside is perfectly flat, nominally removing wafer warp (Diebold and Goodall 1999). The surface topography of a chucked wafer results from wafer thickness variations (TTV), chuck nonplanarity, and surface structures. Effective metrology requires standard measurement procedures and definitions of the quantity of interest. SEMI and ASTM definitions for surface flatness criteria have been developed for silicon wafers (Diebold and Goodall 1999 and Huff et al. 1993). The relevant definitions must be selected based on the lithography tool type.

  • SFSR/SFSD (Site (or field) flatness–Frontside–Scanner slit leveling/focus–Range/Deviation) should be used for scanning lithography tools.
  • SFQR/SFQD (Site flatness–Frontside–least squares field leveling/focus–Range/Deviation) should be used for full-field steppers (Diebold and Goodall 1999 and Huff et al. 1993).

MTI’s 300iSA is capable of all these measurements. Note that range (for full depth of focus) and deviation (for maximum excursion) are relative to a plane recalculated for every exposed site (or for many sites in the scanner case).The metrology concepts for whole-wafer geometry measurement are also well developed in the standards community. Global flatness (variations relative to a whole-wafer plane) can be an issue in CMP process development and control since these processes often thin the edge of a wafer more than the center. Global flatness metrics defined for silicon wafers include:

  • GFLR (Global flatness–Front surface–Least squares reference plane–Range)
  • GBIR (Global flatness–Back surface–Ideal reference plane–Range) (Diebold and Goodall 1999 and Huff et al. 1993)

Bookmark this page. More information may be added. In the meantime, feel free to send us your inquiry. We now offer Manual and Semi Auto Wafer Measurement Systems.

Are you looking for process control metrology products?  MTI’s systems can measure thickness, total thickness variation, bow and warp as part of in-process monitoring or as a quality station in production.

Industry

Semiconductor/Solar

Applications

Wafer Bow And Warp

Measurement Type

Metrology/Surface